technical data automotive digital clock ic IN7100MQ description in7100 is a automotive digital clock, cmos lsi. IN7100MQ oyww semicon mqfp-44 it drives fluorescent indicator panel directly. it can be driven by a 4.194304 mhz crystal oscillator or an external clock signal (1024 hz). it has 4-ways display brightness control function and its display format is 12 hours. features ? 4.194304 mhz crystal oscillator ? 4-ways display brightness control ( segment signal duty: 1, 1/4, 1/8, 1/16 ) ? hours and minutes setting ? 30 seconds auto correction ? 1024 hz external clock drive ? 1024 hz signal output ? segment output: p-channel open drain ? 40 dip package ms-011ac absolute maximum ratings (ta = 25 c) parameter symbol specification unit power supply voltage v dd - v ss ? 0.5 ~ + 8.0 v input voltage v in v ss ? 0.3 ~ v dd + 0.3 v output voltage v out v dd ? 30 ~ v dd + 0.3 v operating temperature t a ? 40 ~ + 85 c storage temperature t stg ? 55 ~ + 125 c dc characteristics (ta=25 c, rh 70%, c d =c g =15pf, x tal =4.194304mhz) characteristic symbol test conditions min typ max unit power supply voltage v dd -v ss 3.0 ? 7.0 v power supply current i dd no output loads, v dd =6v ? 0.3 0.5 ma leakage current i off v dd -v ss =5.0v 5.0 a high level output current (1) i oh1 v dd -v ss =3.0v, v dd -v out =0.5v 300 ? ? a high level output current (2) i oh2 v dd -v ss =3.0v, v dd -v out =0.5v 500 ? ? a low level output current (3) i ol v dd -v ss =3.0v, v out ?v ss =0.5v 500 ? ? a high level input current (4) i ih1 v in =v dd =6v ? 15 30 a high level input current (5) i ih2 v in =v dd =6v ? 120 600 a external clock duty c ld 40 50 60 % osc. feedback resistance r f v dd =6v 3 m (v dd -v ss =3.0~7.0v, ta = ? 40 ~ +85 c, rh 70%, c d =c g =15pf, x tal =4.194304mhz) rev. 00
IN7100MQ characteristic symbol test conditions min typ max unit power supply current i dd no output loads ? ? 0.5 ma high level output current (1) i oh1 v dd -v ss =3.0v, v dd -v out =0.5v 250 ? ? a high level output current (2) i oh2 v dd -v ss =3.0v, v dd -v out =0.5v 400 ? ? a (1) for segment other than bc4, ad2, 1hz (2) for segment bc4, ad2, 1hz and clout (3) for clout (4) for ds1, ds2, res, hs, ms and blk (5) for t1, t2, t3 and ac pin configuration ds1 1 12 23 11 33 34 44 22 ds2 bc4 g3 t3 vdd vdd blk n.c n.c n.c n.c a3 f3 t2 vss ac cl out clk res oi oo vss ms hs e3 d3 c3 g2 e2 c2 g1 e1 d1 c1 b3 1hz f2 ad2 b2 f1 a1 b1 t1 mqfp-44 rev. 00
IN7100MQ block diagram (for die) rev. 00
IN7100MQ application circuit d1 in4007 r1 zd1 270 in4743a rev. 00 oi oo ac segment ? + fip filament 4.194304 mhz grid clout 1024 hz vdd res hs ms blk ds2 r2 18k r7 30k r8 100k ds1 t3 t2 clk vss r3 6.8k + zd2 in4732a + c4 1000pf c3 47uf cx 1 pf c2 15 pf ec1 0.22 uf b+ r5 27 c5 10uf r4 67 2w d2 in4007 ign t+ d3 in4007 t1 d4 in4007 e ?
IN7100MQ application circuit (for emi enhancement) d1 in4007 r1 100 zd1 in4743a rev. 00 oi oo ac segment ? + fip filament 4.194303 mhz grid clout 1024 hz) vdd res hs ms ec1 1 uf c2 13 pf c1 15 pf blk ds2 r2 47k r7 33k ds1 t3 t2 clk vss + r4 67 2w zd2 in4732a + c4 10nf c3 33uf cx (1 pf) b+ r5 24 c5 10uf d2 in4007 ign t+ d3 in4007 d4 in4007 t1 e ? zd3 in4732a
IN7100MQ rev. 00 pin description qfp-44 name i/o description 1 e3 o segment output 2 d3 o segment output 3 c3 o segment output 4 g2 o segment output 5 e2 o segment output 6 c2 o segment output 7 g1 o segment output 8 e1 o segment output 9 d1 o segment output 10 c1 o segment output 11 -- -- no connection 12 clk i external clock input; external clock of 1024 hz frequency can drive the ic operation 13 clout o clock output; clock of 1024 hz fr equency is generated wh en using 4.194304 mhz crystal 14 ac i clear input (power on reset input pin) 15, 16 vss i ground 17 oo o oscillator output (4.194304 mhz crystal output) 18 oi o oscillator input (4.194304 mhz crystal input) 19 res i res input ( 30 minutes auto correction input) 20 hs i hour adjust input 21 ms i minute adjust input 22 -- -- no connection 23 t1 i test pin1 24 b1 o segment output 25 a1 o segment output 26 f1 o segment output 27 b2 o segment output 28 ad2 o segment output 29 f2 o segment output 30 1hz o segment output (colon) -- -- no connection 31 b3 o segment output 32 -- -- no connection 33 -- -- no connection 34 a3 o segment output 35 f3 o segment output 36 t2 i test pin2 37 t3 i test pin3 38, 39 v dd i power supply 40 blk i blancking input; when this pin is low state, fip is off and the operation of hs, ms, res, switch is blocking, or vice versa 41 ds1 i 42 ds2 i dimmer input1, dimmer input2; this pin control the brightness of fip. duty of segment output is determined depend on the level of ds1, ds2 | ds1 | v dd | v ss | v dd | v ss | | ds2 | v dd | v dd | v ss | v ss | | duty | 1/16 | 1/8 | 1/4 | 1 | 43 bc4 o segment output 44 g3 o segment output
IN7100MQ internal state pull down: blk, ds1, ds2, ac, res, hs, ms, te1, te2, te3 p-ch open drain: bc4, g3, e3, d3, c3, g2, e2, c2, g1, e1, d1, c1, b1, a1, f1, b2, ad2, f2, 1hz, b3, a3, f3 pgk dimension (mqfp-44) rev. 00
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